1. Field of the Invention
The present invention relates to the architecture of a network device in a packet switched network and more particularly to method of synchronizing tables in the network device with tables in a CPU associated with the network device.
2. Description of the Related Art
A packet switched network may include one or more network devices, such as a Ethernet switching chip, each of which includes several modules that are used to process information that is transmitted through the device. Specifically, the device includes an ingress module, a Memory Management Unit (MMU) and an egress module. The ingress module includes switching functionality for determining to which destination port a packet should be directed. The MMU is used for storing packet information and performing resource checks. The egress module is used for performing packet modification and for transmitting the packet to at least one appropriate destination port. One of the ports on the device may be a CPU port that enables the device to send and receive information to and from external switching/routing control entities or CPUs.
As packets enter the network device from multiple ports, they are forwarded to the ingress module where switching and other processing are performed on the packets. Thereafter, the packets are transmitted to one or more destination ports through the MMU and the egress module. During processing, the ingress module performs lookup operations required for layer 2 (L2) switching and implements operations for maintaining appropriate L2tables. Specifically, the ingress module performs aging and learning operations and implements CPU insert, delete and lookup instructions in certain tables. An aging operation is one in which the device ages/delete entries in an L2 table that have not been accessed for a predefined time period. A learning operation is one in which the device inserts an entry that does not exist in the L2 table. To support some software applications in a CPU associated with the device, the CPU needs to know when layer 2 table entries are modified. Thus, the CPU needs to have a way a tracking modifications to certain tables in the device.